搜索资源列表
MT9M001
- FPGA驱动MT9M001的verilog代码，里面还有ddr3部分将图像数据进行存储，lcd进行图像显示，里面的摄像头驱动部分很详细，大家可以多研习研习-Verilog driver MT9M001 code, which is also the DDR3 image data storage, LCD display, which drives the part is very detailed, we can learn more
20_lcd
- FPGA实现LCD显示，verilog编程控制-FPGA achieve LCD display, Verilog programming control
ov7670_lcd_verilog
- OV7670 摄像头LCD 显示的FPGA代码，测试通过-OV7670 camera LCD display FPGA code, the test passed
lcdILI9325FPGA
- lcdILI9325FPGA lcd FPGA
zonghe
- Quartus环境下编写的FPGA综合测试程序，能实现频率测量，数码管显示，12864液晶显示，1602液晶显示，点阵扫描显示，AD采样程序，DA输出电压程序，可以通过拨码开关控制上述功能的分别实现，还可以通过遥控器实现上述功能的控制实现。-Quartus environment prepared by the FPGA integrated test program, to achieve frequency measurement, digital display, 12864 LCD, 1
tinycpufiles
- TinyCPU源码,使用Verilog编写的资源占用极少的CPU。Quartus工程，可跑在Altera MAXII CPLD上,也很方便移植到其他FPGA上。CPU使用200个逻辑单元，外设(SPI,LCD等)使用180个逻辑单元。 内含汇编编译器源码(VC2008)，可编译CPU对应的汇编文件。-The sourcecode of TinyCPU, which only consumed very few logical cells, written by Verilog. It is
sdram_ov7670_vga
- 基于FPGA的CMOS摄像头视频采集传输，lcd显示。-FPGA-based CMOS camera video capture transmission, lcd display.
LCD1602
- 1602程序，适用于FPGA/VHDL对于LCD1602液晶屏的控制。(1602 program, apply to FPGA/VHDL for LCD1602 LCD screen control.)
Display
- display lcd code vhdl for fpga
source code
- 2.6'TFT_LCD驱动源程序，可以在quartusII平台上直接运行(2.6'TFT_LCD driver source program, you can run directly on the quartus II platform)
ld01_02_20170816_v1_01
- 采用STM32F105和FPGA设计的驱动液晶屏的电路图。(Circuit diagram of driving LCD screen designed by STM32F105 and FPGA)
fdfd
- 第二章 设计思路 2.1 设计总体框图 有分析可知，本次课程设计可以分成五个木块来实现相应的功能，分别是输入模块，计算模块，扫描模块，输出模块以及显示模块。((Calculator design based on FPGA DE2 development board. language use Verilog. Matrix keyboard input, LCD1602 display. Program includes key scanning module and LCD modul
wangfei
- 基于FPGA的一个LCD显示的网费计价系统设计(costing system of network)
LCD_ML605
- Motor speed controller using VHDL